NCP5181
IN_HI
IN_LO
DRV_HI
DRV_LO
Figure 3. Input/Output Timing Diagram
IN_HI
IN_LO
50%
50%
t on
t r
90%
t off
90%
t f
DRV_HI
DRV_LO
10%
10%
Figure 4. Switching Time Waveform Definitions
IN_LO
IN_HI
50%
50%
DRV_HI
t off
90%
t on
Delta_t
10%
t off
90%
Delta_t
t on
DRV_LO
10%
Figure 5. Delay Matching Waveforms Definition
IN_LO
&
IN_HI
50%
50%
DRV_HI
t on_HI
Delta_t
10%
t off_HI
90%
Delta_t
t on_LO
DRV_LO
t on_LO
10%
Figure 6. Other Delay Matching Waveforms Definition
http://onsemi.com
5
90%
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